Frequently asked questions about MAX3421E
CCTV Power Adapter,Security Camera Power Adapters,CCTV Camera Power Adapter Chinasky Electronics Co., Ltd. , https://www.chinaskyswitches.com Abstract: The MAX3421E can add USB host or peripheral functions to any system through the SPI port. The following Frequently Asked Questions (FAQ) answer some questions about the basic operation of the MAX3421E.
What function does MAX3421E accomplish? The MAX3421E is a USB controller that can be used as both a USB peripheral and a USB host. It is built on Maxim's MAX3420E peripheral controller and has an SPI interface with a communication rate up to 26MHz. The MAX3421E contains a full-speed / low-speed transceiver, a smart serial interface engine (SIE), and a register bank that can be accessed through the SPI interface. Does the MAX3421E include a microcontroller? Not included. The MAX3421E is similar to the MAX3420E and can be used with any controller, such as a microcontroller, DSP, or ASIC. The MAX3421E can be connected to SPI master controllers at rates up to 26MHz. Is the MAX3421E a USB On-The-Go (OTG) device? not quite. MAX3421E is a dual-identity (peripheral and host) USB controller, so it can form the digital part of OTG. Although it does not include the VBUS control and other analog circuits required by OTG devices, you can use external circuits to add these functions and control the external circuits through the MAX3421E's general-purpose I / O pins. What does "smart SIE" mean? SIE stands for Serial Interface Engine. SIE converts the signal received by the USB transceiver into a data packet. Ordinary SIE is responsible for basic signal management functions, including: CRC generation and error check bit filling clock regeneration sending and checking handshake packet Smart SIE will go further into the USB protocol to deal with high-level protocol issues, so programmers do not need to intervene in their operations.
Here is an example. The USB host issued an IN request to the peripheral and received valid data, but the data trigger was wrong. What should the host do? According to the USB specification standard on page 622, the ordinary SIE will send the result (the data is correct, but the data trigger is wrong) to the microprocessor, and hand it over to the firmware to respond correctly.
The MAX3421E's intelligent SIE is handled in this way. The MAX3421E sends an ACK handshake packet, but does not convert the data trigger or generate an interrupt request RCVDAV (received data is ready). If an interrupt is generated, it indicates that the CPU received data is valid. If you think it is incredible to trigger an acknowledgement (ACK) packet with the wrong data, please consult the MAX3421E programming guide for more information. The MAX3421E handles these USB protocols, so the firmware requires no intervention.
As another example, the MAX3421E as a host, its intelligent SIE automatically generates a frame flag of 1ms. The CPU connected to the MAX3421E sends host packets by writing to the HXFR register. If the HXFR register is written at a later time within a frame, the remaining frame time is too short, which may cause frame mark conflicts. In this case, SIE will automatically postpone it to the next frame before sending. What is the difference in electrical characteristics between MAX3421E and MAX3420E? Both devices have two power pins: VCC and VL. VL acts as a threshold voltage for on-chip level shifters, allowing these devices to work in mixed voltage systems.
If the power supply currents ICC and IL of these two devices are compared separately, it will be found that they are different, because: The MAX3420E supplies power to the oscillator, PLL, and transceiver through VCC, and the digital logic circuit through VL. The MAX3421E supplies power to all modules including the oscillator, PLL, transceiver, and digital logic circuit through VCC. Therefore, its ICC is greater than the MAX3420E. Can MAX3421E directly replace MAX3420E in peripheral mode? Can't. The MAX3421E has more signal pins than the MAX3420E, and the MAX3421E's TQFP package (5mm x 5mm) is smaller than the MAX3420E's TQFP package (7mm x 7mm). So is the code of the MAX3421E compatible with the MAX3420E in peripheral mode? Yes. After the MAX3421E is powered on or reset, it works in peripheral mode by default. The register set configuration in this mode is the same as the MAX3420E. What USB transfer types and speeds does the MAX3421E support as a USB host? The MAX3421E can be used as a low-speed (1.5Mbps) or full-speed (12Mbps) host. In low-speed mode, the MAX3421E supports CONTROL, BULK, and INTERRUPT transmission. In full speed mode, support CONTROL, BULK, INTERRUPT and ISOCHRONOUS transmission. Can the MAX3421E communicate with low-speed devices connected to a hub? can. The intelligent SIE handles the signaling details. If the host firmware sets the HUBPRE bit to 1, the SIE automatically sends a full-speed PRE packet to the hub before switching to low-speed signaling mode. Can the MAX3421E detect whether its connection is a host or a peripheral? can. If the design includes both type A and type B connectors, you can set the MAX3421E to host mode (HOST bit equal to 1), turn on the internal DP / DM pull-down resistor, and provide 5V for the VBUS pin of the type A connector power supply. An interrupt from the MAX3421E indicates whether peripherals are connected. For Type B connectors, connect the VBUS pin to the V342COMP (VBUS comparator) input of the MAX3421E. When the user plugs it into the PC, the MAX3421E detects VBUS and configures itself in peripheral mode. Can the MAX3421E be electrically isolated? can. The SPI interface of the MAX3421E is the same as the SPI interface of the MAX3420E. For this question, please refer to the MAX3420E application note: MAX3420E FAQ. When the MAX3421E is used as a USB peripheral, what functions are added compared to the MAX3420E? The MAX3421E adds 4 general-purpose input pins and 4 general-purpose output pins. As a result, all GPIOs provided by the MAX3421E have 8 inputs and 8 outputs. The MAX3421E provides interrupt request functions for eight general-purpose input pins. Each pin has a corresponding interrupt enable bit and edge polarity bit. The MAX3421E provides a SEPIRQ bit. This bit allows the GPX pin to be used as the second interrupt output pin (except the INT pin). This interrupt is only used for the GPIN interrupt. In edge interrupt mode, when one interrupt flag is cleared while the other interrupt is still suspended, the MAX3421E can set the time interval (pulse width) at which the INT pin is released and the interrupt signal is regenerated.