Analysis of the principle, function and importance of PCB transmission system (PDS) design
Can the PCB's power transmission system (PDS) design be ignored? This task is often overlooked, but it is critical for system-level analog and digital designers. The PDS is designed to minimize voltage ripple generated in response to supply current requirements. All circuits require current, some require more circuitry, and some require current at a faster rate. With a fully decoupled low-impedance power or ground plane and good PCB stacking, voltage ripple due to the current requirements of the circuit can be minimized. For example, if the designed switching current is 1A and the PDS impedance is 10mΩ, the maximum voltage ripple is 10mV. First, a PCB stack structure that supports a larger layer of capacitance should be designed. For example, a six-layer stack may include a top signal layer, a first ground layer, a first power layer, a second power layer, a second ground layer, and a bottom signal layer. It is prescribed that the first ground layer and the first power layer are close to each other in the stacked structure, and the two layers are spaced apart by 2 to 3 mils to form a laminar layer capacitance. The biggest advantage of this capacitor is that it is free and only needs to be noted in the PCB manufacturing notes. If the power plane must be split and there are multiple VDD rails on the same layer, the largest possible power plane should be used. Don't leave holes, but also pay attention to sensitive circuits. This will maximize the capacitance of the VDD layer. If the design allows for the presence of additional layers (in this case, from six to eight), then two additional ground planes should be placed between the first and second power planes. In the case where the core pitch is also 2 to 3 mils, the inherent capacitance of the laminated structure at this time is doubled. For ideal PCB stacking, decoupling capacitors should be used at the power supply layer start entry point and around the DUT, which will ensure that the PDS impedance is low over the entire frequency range. Using a few 0.001μF to 100μF capacitors helps cover this range. It is not necessary to configure the capacitors everywhere; the capacitors facing the DUT will destroy all manufacturing rules. If such severe measures are required, there are other problems with the circuit. Enclosure Junction Box,Ip44 Waterproof Terminal,Electronic Connector Box, Outdoor Cable Connectors,junction box Guangdong Ojun Technology Co., Ltd. , https://www.ojunconnector.com