Frequently Asked Questions in FPC Circuit Design
First, the overlap of the pads 1. The overlap of the pads (except for the surface mount pads) means the overlap of the holes. In the drilling process, the drill bit is broken due to multiple holes in one hole, resulting in damage to the holes. 2. The two holes in the multi-layer board overlap, for example, one hole is the isolation plate, and the other hole is the connection plate (flower pad), so that the negative film is formed as a spacer disk, resulting in scrapping. Second, the abuse of the graphics layer 1. Some useless connections were made on some graphics layers. The original four-layer board was designed with five or more layers, which caused misunderstanding. 2, design time to save trouble, take Protel software as an example to use the Board layer to draw the lines of each layer, and use the Board layer to draw the line, so when the light drawing data, because the Board layer is not selected, missed Wired and disconnected, or shorted by selecting the labeling line of the Board layer, so the design layer is kept intact and clear. 3, contrary to the conventional design, such as the component surface design in the Bottom layer, the welding surface design in the Top, causing inconvenience. Third, the random placement of characters 1. The character cover pad SMD soldering piece brings inconvenience to the on-off test of the printed board and the soldering of the component. 2, the character design is too small, causing the difficulty of screen printing, too large will make the characters overlap each other, difficult to distinguish. Fourth, the single-sided pad aperture setting 1. Single-sided pads are generally not drilled. If the holes are to be marked, the aperture should be designed to be zero. If a numerical value is designed such that when the drilling data is generated, the coordinates of the hole appear at this position, and a problem occurs. 2. Single-sided pads such as drilled holes should be specially marked. Fifth, draw pads with padding Draw a pad with a pad to pass the DRC check when designing the line, but it is not suitable for processing. Therefore, the pad cannot directly generate solder resist data. When the solder resist is applied, the pad area will be covered by the solder resist, resulting in The device is difficult to solder. Sixth, the electric ground layer is a flower pad and a connection Because the power is designed as a flower pad, the ground plane is the opposite of the image on the actual printed board, and all the connections are isolated lines. This should be very clear to the designer. By the way, when drawing several sets of power supplies or isolation lines of several grounds, care should be taken not to leave a gap, so that the two sets of power supplies are short-circuited, and the area of ​​the connection cannot be blocked (so that a group of power supplies are separated). Seven, the definition of processing level is not clear 1. The single-panel design is in the TOP layer. If you do not explain the positive and negative, the board may not be soldered. 2. For example, a four-layer board design uses four layers of TOP mid1 and mid2 bottom, but the processing is not performed in this order, which requires explanation. Eight, too many filler blocks in the design or filled blocks filled with very thin lines 1. The phenomenon that the light drawing data is lost is lost, and the light drawing data is not complete. 2. Because the filling block is drawn by lines one by one during the processing of the light drawing data, the amount of light drawing data generated is quite large, which increases the difficulty of data processing. Nine, surface mount device pads are too short This is for the on-off test. For a surface-mount device that is too dense, the spacing between the two legs is quite small, and the pads are quite thin. The test pins must be mounted up and down (left and right), such as pads. The design is too short, although it does not affect the device installation, it will make the test pin wrong. Ten, the spacing of large area grid is too small The edge between the large-area grid lines and the same line is too small (less than 0.3mm). During the manufacturing process of the printed board, the image transfer process is likely to cause a lot of broken film to adhere to the board after the completion of the shadow, causing the broken line. 11. The distance between the large area of ​​copper foil and the outer frame is too close. The large-area copper foil should be at least 0.2mm or more from the outer frame, because it is easy to cause the copper foil to rise and the solder resist off due to the milling to the copper foil. Twelve, the shape of the border design is not clear Some customers have designed outline lines in Keep layer, Board layer, Top over layer, etc. These outline lines do not overlap, which makes it difficult for pcb manufacturers to judge which outline line is subject to. Thirteen, uneven graphic design In the case of pattern plating, the plating is uneven and affects the quality. 14. Apply grid lines when the copper area is too large to avoid foaming during SMT Outdoor Fiber Cable,Outdoor Fiber,2 Core Outdoor Fiber Optic Cable,2 Core Outdoor Cable Zhejiang Wanma Tianyi Communication Wire & Cable Co., Ltd. , https://www.zjwmty.com